(a) Field of the Invention
The present invention relates to a wiring board for use in flip-chip mounting of an electronic component (chip) such as a semiconductor element, and a method of manufacturing the same.
Since serving as a package in which a semiconductor chip is mounted, the wiring board is also referred to as a “semiconductor package” for convenience in the following description.
(b) Description of the Related Art
In a structure in which a semiconductor chip is flip-chip bonded onto a wiring board, it is a general practice to reinforce the connection between the chip and the board by filling a gap therebetween with underfill resin in order to secure the reliability of the connection between the chip and the board. To bring about the reinforcement effect, filling is performed so that the underfill resin can slightly overflow from the gap between the chip and the board to the periphery thereof, and can form the skirt of a mountain extending downward from the chip located at the top of the mountain when viewed in cross section. Namely, the resin needs to be filled so that the resin overflowed from the gap between the chip and the board can further flow upward along a sidewall portion of the chip and then form a fillet portion.
Depending on the viscosity of the underfill resin used to fill the gap between the chip and the board, the underfill resin after the filling has low fluidity (when viscosity is high) or has high fluidity (when viscosity is low). This variation in fluidity influences the flowing way (behavior) of the resin within the area between the chip and the board, and the range in which the resin overflowing from the gap between the chip and the board spreads to the periphery thereof.
The underfill resin is infiltrated into a small gap (approximately 50 μm under current technology) between the chip and the board by capillary action. Here, the resin with low fluidity does not flow smoothly. For this reason, a void (air bubble) is likely to be formed in the resin filled inside an opening portion between the chip and the board during a process in which the resin flows to the inside of the opening portion from a portion (resin injection portion) along the outer periphery of the chip of the opening portion. When a void is formed, the reliability of the connection between the chip and the wiring board decreases because a sufficient bonding strength cannot be obtained. In addition, there is a concern that a crack is generated in the resin because the air in the void expands due to a heating (curing) process after the filling of the resin.
In order to avoid the generation of such a void, underfill resin having high fluidity may be used. However, the resin with high fluidity flows easily, so that an outflow range of the resin overflowing from the gap between the chip and the board may be extended more than necessary. In this case, other circuit elements, pads and the like disposed around the chip are negatively influenced. In particular, such a negative influence is more noticeable in wiring boards which are nowadays generally used for high-density packaging. With this regard, various techniques have been proposed for restricting the outflow range of the resin overflowing from the gap between the chip and the board (Namely, for preventing the resin from spreading more than necessary).
As a typical example of the aforementioned techniques, there is a method of producing a dam structure (a portion raised in a wall-like shape or a portion recessed in a groove-like shape) around the chip mounting area on the board. Examples of the method of producing such a dam structure include: a method in which a photosensitive insulating resin (solder resist) is patterned using a photolithography technique; a method in which an insulating resin is applied by a screen printing method; a method in which a plate-like member formed in a frame-like shape is attached; and the like. Techniques related to these methods are described in Japanese unexamined Patent Publication (JPP) (Kokai) 2004-186213, JPP (Kokai) 5-283478 and the like, for example.
Meanwhile, when there are irregularities in an area (board surface facing the chip) in which the resin injected from the opening portion around the chip flows to the inside of the opening portion and is filled, a void may possibly be generated in the vicinity of the irregular portion even if underfill resin with high fluidity is used. An example of this is a case where a level difference exists between the surface of the insulating layer (solder resist layer), which is the outermost layer, and the surface of a pad exposed from the insulating layer. Accordingly, in order to effectively suppress generation of voids, it is desirable to flatten the board surface on which the underfill resin flows.
A technique related to this is described in JPP (Kokai) 2006-344664. According to the technique described in this document (See FIG. 8), a belt-like wiring conductor 5a and a conductive protrusion 12 (equivalent to a pad) are first coated with resin 6a for a solder resist layer. Then, a solder resist layer 6 is formed by grinding the resin 6a until the upper surface of the conductive protrusion 12 is exposed. As a result, a wiring board 10 is obtained in which the upper surface of the conductive protrusion 12 is exposed to be substantially flush with the upper surface of the solder resist layer 6.
As described above, in the conventional wiring board for mounting a chip, the resin overflowing from the gap between the chip and board at the time of filling the gap with the underfill resin is prevented from spreading more than necessary by forming the dam structure around the chip mounting area on the board. In addition, when the dam structure is formed, an additional process is required. Specifically, the addition process is to form a dam portion on the outermost insulating layer (patterning of a photosensitive insulating resin by photolithography, coating with insulating resin by a printing method, attaching of a plate member formed in a frame-like shape, or the like) after the insulating layer positioned outermost (solder resist layer) is formed on the board.
Namely, there is a problem that the number of manufacturing steps and the costs associated therewith are increased because an additional process for forming the dam structure and a material used therefor are required.
The problem may occur as well in the aforementioned wiring board having a flat board surface on which underfill resin flows, such as described in JPP (Kokai) 2006-344664. Namely, in order to form the same dam structure as the aforementioned one on this wiring board, an additional process for forming the dam portion is required. Specifically, the additional process is to form the dam portion on the upper surface of the outermost insulating layer (solder resist layer) after performing the processing to align the upper surface of the outermost insulating layer with the upper surfaces of the pad (conductive protrusion) (to coat the conductive protrusion with the resin for the solder resist layer and then to grind this resin until the upper surface of the conductive protrusion is exposed).